1. Field of the Invention
This invention relates generally to the structure and fabrication process for manufacturing the junction barrier Schottky device. More particularly, this invention relates to a novel device structure and fabrication process for manufacturing junction barrier Schottky with low forward voltage drop and improved reverse block voltage.
2. Description of the Prior Art
Even with excellent performance characteristics of a low forward voltage drop and fast reverse recovery period, the usefulness of a junction barrier Schottky device is still limited by several technical difficulties. A first technical limitation is the increase amount of reverse leakage current with the reduce junction barrier height. While a reduce junction barrier height provides an advantage of low forward conduction loss, it produces an associated side effect of increased reverse leakage current. Compared to common p-n junction diode, the poor reverse bias characteristics often become a limitation to the practical useful application of an Schottky device. Another limitation of the usefulness of the junction barrier Schottky is the silicon area it often requires to provide sufficient current when implemented as a rectifier as part of a power input device.
In order to improve the reverse bias characteristics of the Schottky device, Buchanan Jr. et al. disclose in a Statutory Invention Registration (SIR) H40 entitled “Field Shields for Schottky Barrier Devices”, a method to reduce the reverse leakage current in a Schottky barrier device by forming one or more field shields with a P+ type diffusion. The field shields P+ type regions as that shown in FIG. 1A are formed right under the metal anode of the Schottky. The field shields are disposed with a pattern to reduce the surface electric field thereby reduces the reverse leakage current.
However, with the P+ field shields formed by P+ ion implantation followed by diffusion as that taught by Buchanan Jr., generates another difficulty as a significant portion of silicon areas are used due to the lateral diffusion of the P+ ions. The forward junction barrier is increased unless large silicon areas are allowed between the implanted P+ regions. For this reason, Buchanan's device would not be practical for application to electronic devices that require miniaturized power input device with a requirement of providing substantial amount of input current. The size of Schottky device implemented with P+ diffusion regions as that disclosed by Buchanan Jr. would become unfittingly oversized for application in miniaturized devices. Additionally, unless significant larger size Schottky devices are implemented, the forward barrier height would also be adversely affected due to the lateral diffusions of the P+ ions, that if not well controlled, could significantly reduces the forward conducting volume. Buchanan's device could encounter a similar difficulty of increasing the forward barrier height when forming the field shields by P+ diffusion near the top surface of the Schottky barrier device in attempt to increase the reverse block voltage.
FIGS. 1B and 1C are cross sectional view and a top view respectively of a junction barrier Schottky diode disclosed by another U.S. Pat. No. 6,524,900. FIG. 1B illustrates a method for controlling the temperature dependence of a junction barrier Schottky diode by first forming a plurality of P doped regions 4 as grid then adjusting the doping concentration of the drift layer regions 7 later with the drift regions 7 become a part of the grid portion. The drift layer 2 as a SiC semiconductor material of the diode may be epitaxially grown while introducing donors at a concentration of 1016/cm3 until reaching the thickness where the grid portion is intended to start. The doping concentrations of these grid regions are adjusted to adjust the cross-over point at which the temperature coefficient changes from negative to positive for maintaining a substantially constant current density. The disclosure made in the U.S. Pat. No. 6,524,900 further explains that by forming the P+ doped region with larger lateral distance, the relation between the lateral cross section area of the drift layer regions 7 of the grid portion with respect to the total lateral cross section area of the diode will be increased resulting in a decrease of the resistance of the grid portion of the diode. However, as discussed above, even the U.S. Pat. No. 6,524,900 claims improvements of temperature stability such configuration increases the lateral dimension of the P+ doped regions thus increases the volume of the Schottky devices. The devices as disclosed in this Patent would have limitations of application for modern miniaturized devices require sources of power supply with reduced volumes.
Therefore, a need still exits in the art of design and manufacture of Schottky barrier device to provide a novel structural configuration and fabrication process that would resolve these difficulties. More specifically, it is preferably that the Schottky barrier device can achieve low forward barrier height with high reverse block voltage without a requirement to increase the volume of the Schottky device.